In the digital audio and telecommunications fields, the high accuracy and high resolution digital-to-analog conversion (DAC) technology has become one of the key analog circuit technologies. Conventionally, either the weighted network circuit technique with trimming, or the multislope integration technique has been utilized for high resolution DACs. In the weighted network, some trimming of the weighted network utilizing a laser, dynamic element matching, or the digital method utilizing Read-Only Memory (ROM), was required. This is due to the conversion accuracy, which depended in large part on the device matching tolerance of the weighted network. Typically, untrimmed weighted networks would yield a fourteen bit accuracy, whereas the trimmed network could attain a conversion accuracy of over fifteen bits. In the multislope integration circuit technique, on the other hand, integrators, sample and hold circuits and current sources are required, which of necessity must be high speed devices with relatively high accuracy. High resolution DACs utilizing this technology are difficult to realize due to the sample charge and the sample capacitor leaking through the base impedance of the transistors, which typically use bipolar technology.
Another technique that has come to the forefront in DAC technology is that utilizing oversampling conversion techniques. These typically utilize a delta-sigma modulator in conjunction with conventional oversampling noise shaping techniques utilizing digital filters. Typically, an interpolation filter is utilized to increase the sample rate and then filter all images and quantization noise at F.sub.s /2 and above, F.sub.s being the input sampling frequency. The output of the interpolation filter is then processed through a sample and hold circuit to provide the oversampled output. If the interpolation filter provides a factor of 8x increase in the sampling rate, the sample and hold circuit could provide another 8x of increase to result in a total of 64x of oversampling. The delta-sigma modulator receives the output of the combined interpolation filter and sample and hold circuit and converts this oversampled signal into a one-bit data stream. This one-bit output controls a DAC, which has only two analog levels and, therefore, is inherently linear. This signal is then input to an analog low pass filter.
With the oversampling noise shaping techniques utilized with high resolution DACs, two problems have been recognized--DC offset and phase linearity. The digital portion of the DAC comprising the interpolation filter, sample and hold circuit and the delta-sigma modulator can be designed such that they are substantially phase linear, and DC offset can also be provided. However, when the analog portion of the overall DAC system is implemented, i.e., the analog low pass filter, an additional level of DC offset may be introduced into the system in addition to a phase response non-linearity. It is very difficult to remove DC offset and provide a linear phase response in the analog portion of the DAC converter system. In applications such as digital audio, this DC offset and phase response linearity is audible and detracts from the high quality of audio that is desired. In view of these disadvantages, it is desirable to provide a DAC system that provides a method to calibrate the DC offset for the combined digital-to-analog portions of the DAC system, and also provide an overall phase linearity for the system.